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Reconfigurable computing : ウィキペディア英語版
Reconfigurable computing

Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGAs). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the datapath itself in addition to the control flow. On the other hand, the main difference with custom hardware, i.e. application-specific integrated circuits (ASICs) is the possibility to adapt the hardware during runtime by "loading" a new circuit on the reconfigurable fabric.
==History==

The concept of reconfigurable computing has existed since the 1960s, when Gerald Estrin's paper proposed the concept of a computer made of a standard processor and an array of "reconfigurable" hardware.〔
Estrin, G., "Organization of Computer Systems—The Fixed Plus Variable Structure Computer",
''Proc. Western Joint Computer Conf.'', Western Joint Computer Conference, New York, 1960, pp. 33–40.〕 The main processor would control the behavior of the reconfigurable hardware. The latter would then be tailored to perform a specific task, such as image processing or pattern matching, as quickly as a dedicated piece of hardware. Once the task was done, the hardware could be adjusted to do some other task. This resulted in a hybrid computer structure combining the flexibility of software with the speed of hardware.
In the 1980s and 1990s there was a renaissance in this area of research with many proposed reconfigurable architectures developed in industry and academia,〔C. Bobda: Introduction to Reconfigurable Computing: Architectures; Springer, 2007〕 such as: Copacobana, Matrix, GARP,〔Hauser, John R. and Wawrzynek, John,
"Garp: A MIPS Processor with a Reconfigurable Coprocessor",
''Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines''
(FCCM '97, April 16–18, 1997), pp. 24–33.
〕 Elixent, PACT XPP, Silicon Hive, Montium, Pleiades, Morphosys, and PiCoGA.〔Campi, F.; Toma, M.; Lodi, A.; Cappelli, A.; Canegallo, R.; Guerrieri, R., "A VLIW processor with reconfigurable instruction set for embedded applications", Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International, vol., no., pp. 250–491 vol. 1, 2003〕 Such designs were feasible due to the constant progress of silicon technology that let complex designs be implemented on one chip. The world's first commercial reconfigurable computer, the Algotronix CHS2X4, was completed in 1991. It was not a commercial success, but was promising enough that Xilinx (the inventor of the Field-Programmable Gate Array, FPGA) bought the technology and hired the Algotronix staff.〔(Algotronix History )〕

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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